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Latest Project Blogs
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 Pictures
Project: Embedded Systems Portability (Embedded)
posted by Charles Jarvis on 1st July 2008
We got the Altera PCI dev kit in today, so work will start on that soon. So that said, here are some pictures of our projects in progress.
First is our new standalone development board. Across the top, you can see that it has USB input, Firewire input, Mic/Line IN/OUT, 2 RCA Video inputs, VGA output, an Ethernet connection, an RS-232 connection, and an SD Card input on the bottom of the board (not in picture). Most of these features won't be used in the courses here at Trinity, but if I have some downtime anytime soon, I plan to play around with alot of the fancier features, get them working, and document them.
Second is the model motor we will be using. As soon as our machine shop technician gets back from vacation next week, we will have a mount built so that a DC motor can be mounted to drive the crankshaft.
Third is the robot arm we have built. It has 5 DC motors to control it's movement: One at the base which allows almost 360 degrees of rotation, three at each joint on the arm, and one to control the clamp at the top. Sometime this week, we will begin to place sensors on there so that we can grab position measurements. On the bottom right is the logic and driver for one of the motors. The plan is to implement that logic in VHDL and put that on to our DE2, and put two more SN754410 chips on there so that we can control 5 motors easily.
Fourth is the Altera PCI Development kit we just got in today. One immediate hurdle we have to overcome is fitting this thing inside one of the OpenClient cases. It's physically too big to fit in the cases we have. Also, there is an extra set of "pins" (or whatever the proper name for the PCI connectors are) on the bottom right side of the board. This may be for PCI Express, but we'll have to research that before taking a saw to our equipment (These PCI dev kits are about $1000 each).
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Progress
Project: Embedded Systems Portability (Embedded)
posted by Charles Jarvis on 30th June 2008
It's been a month and we've made quite a bit of progress with our projects.
I. Instron Strength Tester
This was one of the first projects to be worked on this summer. For the past 25 years, the Instron 4201 in the Trinity Machine Shop was run by an IBM PC XT, which ran a $10,000 software package made by Instrong specifically for the 4201. Because of the high cost, it was never updated (nor did it need to be, since the only upgrade would be a prettier interface). Our aim is to replace the old system with a LabVIEW VI run on an Efika OpenClient/QNX package available from National Instruments. Most of the LabVIEW work was done this past spring semester by one of this years graduating seniors, Alexandra Miller. Now all of the kinks are worked out and a few more features--such as raw data formatting, plotting, and important material property calculations--have been added, so the VI is nearly ready for student use come August. However, progress has somewhat stalled with the OpenClient/QNX package, so the system is temporarily running on a Dell PC. Alot of the QNX work was done by an NI intern who we're trying to get in on the project.
II. Controls Projects
One of our other projects is to use a PCI-capable FPGA to interface with/control a set of "plants." However, the PCI-capable FPGAs are on backorder from Altera until August, so in the meantime, we will develop the control systems and interfacing with a standalone Altera development board. Two of the plants have been constructed. The V8 Model Engine was completed last week. Now it needs a DC motor mounted to it so that we can control speed via a MOSFET. The robot arm was finished a couple of weeks ago and we have made interfacing for it. We used an SN754410 Quadruple Half H-Bridge (it's a mouthful) as the motor driver and built a logic circuit that provides a layer of abstraction for the student. The system has three easy inputs: PWM, Brake, Direction, which can be easily controlled from an FPGA.
We also have a brand new Altera DE2-70 FPGA development board which will replace the old Altera UP2 development boards that we've used in the past. Most of this past week has been spent getting accustomed to the new board, since it is far more powerful and has many more features than the previous boards.
Pictues of everything will be up in a couple of days.
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A little update
Project: Software 3D-system (Graphics & 3D)
posted by Peter Halin on 16th June 2008
Haven't written anything here for a while, so I decided to give you all a little update on what's going on. First off some good news: I finished my master's thesis and it got accepted, so now I'm finally finished with my studies :)
Seems like MorphOS will finally come out for the Efika, hopefully still this month. The 3D-engine has already been up and running on 68k-based Amigas for quite a while, and I've rewritten most parts in both C and Asm, so that it's easy to compile a version for different platforms from the C-sources, while 68k-programs can use the assembler-parts for better speed. So as soon as I have MorphOS on my Efika, I'll do a pure ppc-port of my demoengine for it.
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Progress on 'The EFIKA Lab'
Project: Embedded Systems Portability (Embedded)
posted by Kevin Nickels on 4th June 2008
One way to summarize the project would be to say that we're bulding an EFIKA lab at Trinity. If you read the description, you'll see that we're actually making a half-dozen demos of "different ways to control things". So we've got say a toy model engine - how to control the speed?
You could have an op-amp circuit with a cap and resistor (PI control). But setting the setpoint or change gains is fairly manual.
You could have a microcontroller (e.g. OOPIC) with an H-bridge, now changing the control scheme or setpoints is software. But that's about all this controller can handle - think about moving to a 6-axis robot arm. Now it's not enough (not 6 timer/counters to handle encoders, motor synchronization, etc...)
With some analog/digital electronics interfacing, we could design a circuit to do this, inside an FPGA (Field Programmable Gate Array). Same problem as op-amp WRT control, though.
Now, what if we could, using a computer, do things like change the control gains or setpoint? With a PCI-enabled FPGA and an EFIKA, we think that we can do this. Better yet, we're also going to do it with a lower-power computer and a lighter-weight FPGA/CPLD. Stay tuned.
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Blog archive
Project: Reggae on Efika (Multimedia)
posted by Grzegorz Kraszewski on 16th May 2008
As the site does not provide links to view archived blog entries, I've prepared an archive with all the blog entries linked using permanent links. I also have the contents stored locally, will probably make it public as well, for easier browsing.
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Resampling filters design
Project: Reggae on Efika (Multimedia)
posted by Grzegorz Kraszewski on 13th May 2008
I've designed -60 dB and -80 dB resampling filters today. The first one is 48-tap one (and more when downsampling), is oversampled 32 times, so the half-width table has 768 coefficents. The second, high quality one is 64-tap and is oversampled 128 times, which yields 4096 coefficents in the table. Both filters have 3 dB attenuation at 0.45 of sampling frequency and respectively -60 or -80 dB at 0.5 of sampling frequency. I've also made siginficant progress on resampler reference (not optimized at all) code, but it is not yet finished.
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audio.output progress, audio resampling
Project: Reggae on Efika (Multimedia)
posted by Grzegorz Kraszewski on 12th May 2008
I've done some more work on new audio.output class version. It has a complete subthread framework including command passing. The thread opens AHI, in case of failure, object fails gracefully as it should, with error reported.
I've also started work on a variable rate audio resampler. It uses bandlimited resampling concept described by J. O. Smith. I've started from designing three resample filters, for three levels of quality. The first, low quality filter is ready. It has 257 coefficents in total and spans over 32 input samples (if no scaling is used). The filter ensures both aliasing distortions and filter interpolation distortions are kept below -40 dB.
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Another busy day
Project: Reggae on Efika (Multimedia)
posted by Grzegorz Kraszewski on 7th May 2008
I've made some more changes to http.stream bumping the revision to 51.8. I've added missing attributes, cleaned up the docs, simplified subthread initialization and shutdown code. I've also added a feature allowing applications handling HTTP permanent redirections properly. MMA_StreamName attribute may be queried after object construction, and if there has been any 301 redirection, the attribute contains a new URL. Then an application can update its links.
I've fixed a nasty bug in gif.decoder then. It caused 0x4 location read on every GIF image decoded. Just three missing letters in a function call.
Then there is another bugreport pending, for audio.output this time. Subthread initialization code is broken, so if for any reason subthread fails to initialize, calling application will crash. I've decided to reuse extensively tested http.stream subthread framework. This is work in progress currently.
BTW my Ph.D. thesis is two pages longer since today :-).
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http.stream 51.7
Project: Reggae on Efika (Multimedia)
posted by Grzegorz Kraszewski on 6th May 2008
After almost total rewriting of the class I've finished in finally. The most troublesome thing has been automatic redirection on 3xx server response. It requires that current connection is closed and a fresh one is made with newly generated request. While testing it, it also turned out that some HTTP servers do not comply with RFC 2616 and send relative pathes in "Location" header field, while the protocol specification clearly states it must be absolute. A workaround for this issue has been added.
Anyway it is finished (except some cosmetics) and in my opinion it is a very nice component not only usable as a media stream source for Reggae. An application can use it standalone to fetch any resource available via HTTP GET request. The programmer does not need to have HTTP or socket API knowledge. As http.stream gives easy access to (parsed) HTTP request and response headers, an application can use some advanced features like cookie handling, range requests, conditional requests and more. Automatic redirection makes it easier too (as it is standard feature of any WWW browser, we usually don't even know that it happens, but handling it in own application is a headache, believe me). The new class is on the MorphOS CVS server and probably will not be released separately before the day 11111 (the mysterious date of MorphOS 2.0 release).
Christian Rosentreter reviewed MediaLogger 1.8 and sent me a bunch of style guide and GUI consistency notes. Most of them have been implemented, and MediaLogger 1.9 is on the way to be released publicly at the usual place.
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Old code, new code...
Project: Reggae on Efika (Multimedia)
posted by Grzegorz Kraszewski on 26th April 2008
Glueing an old code and a new code always lead to troubles. The same in http.stream. I've added network thread code and response header parser. After fixing some obvious compiler errors and warnings, I've got a ready executable, which... crashes. My limited time allowed me only to localise the crash in the source code. I will attempt to fix it on Monday.
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